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Commit e72a9340 authored by Vipin Thomas's avatar Vipin Thomas
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Testbench/xsim.log 0 → 100644
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#-----------------------------------------------------------
# xsim v2020.2 (64-bit)
# SW Build 3064766 on Wed Nov 18 09:12:45 MST 2020
# IP Build 3064653 on Wed Nov 18 14:17:31 MST 2020
# Start of session at: Thu Jul 1 18:51:21 2021
# Process ID: 16596
# Current directory: C:/Users/vipin/AppData/Roaming/Xilinx/Vitis/pixel/solution1/sim/verilog
# Command line: xsim.exe -source {xsim.dir/pixel/xsim_script.tcl}
# Log file: C:/Users/vipin/AppData/Roaming/Xilinx/Vitis/pixel/solution1/sim/verilog/xsim.log
# Journal file: C:/Users/vipin/AppData/Roaming/Xilinx/Vitis/pixel/solution1/sim/verilog\xsim.jou
#-----------------------------------------------------------
start_gui
source xsim.dir/pixel/xsim_script.tcl
# set_param project.enableReportConfiguration 0
# load_feature core
# current_fileset
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2020.2/data/ip'.
# xsim {pixel} -view {{pixel_dataflow_ana.wcfg}} -tclbatch {pixel.tcl} -protoinst {pixel.protoinst}
Vivado Simulator 2020.2
INFO: [Wavedata 42-565] Reading protoinst file pixel.protoinst
INFO: [Wavedata 42-564] Found protocol instance at /apatb_pixel_top/AESL_inst_pixel//AESL_inst_pixel_activity
INFO: [Wavedata 42-564] Found protocol instance at /apatb_pixel_top/AESL_inst_pixel/grp_pow_generic_double_s_fu_697/grp_pow_generic_double_s_fu_697_activity
Time resolution is 1 ps
open_wave_config pixel_dataflow_ana.wcfg
source pixel.tcl
## log_wave -r /
WARNING: [Simtcl 6-197] One or more HDL objects could not be logged because of object type or size limitations. To see details please rerun the command with -verbose (-v).
## set designtopgroup [add_wave_group "Design Top Signals"]
## set cinoutgroup [add_wave_group "C InOuts" -into $designtopgroup]
## set in_decimal__selector__stream_count__return_group [add_wave_group in_decimal__selector__stream_count__return(axi_slave) -into $cinoutgroup]
## add_wave /apatb_pixel_top/AESL_inst_pixel/interrupt -into $in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_BRESP -into $in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_BREADY -into $in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_BVALID -into $in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_RRESP -into $in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_RDATA -into $in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_RREADY -into $in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_RVALID -into $in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_ARREADY -into $in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_ARVALID -into $in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_ARADDR -into $in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_WSTRB -into $in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_WDATA -into $in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_WREADY -into $in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_WVALID -into $in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_AWREADY -into $in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_AWVALID -into $in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/s_axi_control_AWADDR -into $in_decimal__selector__stream_count__return_group -radix hex
## set coutputgroup [add_wave_group "C Outputs" -into $designtopgroup]
## set dout_group [add_wave_group dout(axis) -into $coutputgroup]
## add_wave /apatb_pixel_top/AESL_inst_pixel/dout_TDEST -into $dout_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/dout_TID -into $dout_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/dout_TLAST -into $dout_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/dout_TUSER -into $dout_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/dout_TSTRB -into $dout_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/dout_TKEEP -into $dout_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/dout_TREADY -into $dout_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/dout_TVALID -into $dout_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/dout_TDATA -into $dout_group -radix hex
## set cinputgroup [add_wave_group "C Inputs" -into $designtopgroup]
## set din_group [add_wave_group din(axis) -into $cinputgroup]
## add_wave /apatb_pixel_top/AESL_inst_pixel/din_TDEST -into $din_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/din_TID -into $din_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/din_TLAST -into $din_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/din_TUSER -into $din_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/din_TSTRB -into $din_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/din_TKEEP -into $din_group -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/din_TREADY -into $din_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/din_TVALID -into $din_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/AESL_inst_pixel/din_TDATA -into $din_group -radix hex
## set resetgroup [add_wave_group "Reset" -into $designtopgroup]
## add_wave /apatb_pixel_top/AESL_inst_pixel/ap_rst_n -into $resetgroup
## set clockgroup [add_wave_group "Clock" -into $designtopgroup]
## add_wave /apatb_pixel_top/AESL_inst_pixel/ap_clk -into $clockgroup
## set testbenchgroup [add_wave_group "Test Bench Signals"]
## set tbinternalsiggroup [add_wave_group "Internal Signals" -into $testbenchgroup]
## set tb_simstatus_group [add_wave_group "Simulation Status" -into $tbinternalsiggroup]
## set tb_portdepth_group [add_wave_group "Port Depth" -into $tbinternalsiggroup]
## add_wave /apatb_pixel_top/AUTOTB_TRANSACTION_NUM -into $tb_simstatus_group -radix hex
## add_wave /apatb_pixel_top/ready_cnt -into $tb_simstatus_group -radix hex
## add_wave /apatb_pixel_top/done_cnt -into $tb_simstatus_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_in_decimal -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_selector -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_stream_count -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_din_V_data_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_din_V_keep_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_din_V_strb_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_din_V_user_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_din_V_last_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_din_V_id_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_din_V_dest_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_dout_V_data_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_dout_V_keep_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_dout_V_strb_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_dout_V_user_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_dout_V_last_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_dout_V_id_V -into $tb_portdepth_group -radix hex
## add_wave /apatb_pixel_top/LENGTH_dout_V_dest_V -into $tb_portdepth_group -radix hex
## set tbcinoutgroup [add_wave_group "C InOuts" -into $testbenchgroup]
## set tb_in_decimal__selector__stream_count__return_group [add_wave_group in_decimal__selector__stream_count__return(axi_slave) -into $tbcinoutgroup]
## add_wave /apatb_pixel_top/control_INTERRUPT -into $tb_in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/control_BRESP -into $tb_in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/control_BREADY -into $tb_in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/control_BVALID -into $tb_in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/control_RRESP -into $tb_in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/control_RDATA -into $tb_in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/control_RREADY -into $tb_in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/control_RVALID -into $tb_in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/control_ARREADY -into $tb_in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/control_ARVALID -into $tb_in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/control_ARADDR -into $tb_in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/control_WSTRB -into $tb_in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/control_WDATA -into $tb_in_decimal__selector__stream_count__return_group -radix hex
## add_wave /apatb_pixel_top/control_WREADY -into $tb_in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/control_WVALID -into $tb_in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/control_AWREADY -into $tb_in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/control_AWVALID -into $tb_in_decimal__selector__stream_count__return_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/control_AWADDR -into $tb_in_decimal__selector__stream_count__return_group -radix hex
## set tbcoutputgroup [add_wave_group "C Outputs" -into $testbenchgroup]
## set tb_dout_group [add_wave_group dout(axis) -into $tbcoutputgroup]
## add_wave /apatb_pixel_top/dout_TDEST -into $tb_dout_group -radix hex
## add_wave /apatb_pixel_top/dout_TID -into $tb_dout_group -radix hex
## add_wave /apatb_pixel_top/dout_TLAST -into $tb_dout_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/dout_TUSER -into $tb_dout_group -radix hex
## add_wave /apatb_pixel_top/dout_TSTRB -into $tb_dout_group -radix hex
## add_wave /apatb_pixel_top/dout_TKEEP -into $tb_dout_group -radix hex
## add_wave /apatb_pixel_top/dout_TREADY -into $tb_dout_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/dout_TVALID -into $tb_dout_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/dout_TDATA -into $tb_dout_group -radix hex
## set tbcinputgroup [add_wave_group "C Inputs" -into $testbenchgroup]
## set tb_din_group [add_wave_group din(axis) -into $tbcinputgroup]
## add_wave /apatb_pixel_top/din_TDEST -into $tb_din_group -radix hex
## add_wave /apatb_pixel_top/din_TID -into $tb_din_group -radix hex
## add_wave /apatb_pixel_top/din_TLAST -into $tb_din_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/din_TUSER -into $tb_din_group -radix hex
## add_wave /apatb_pixel_top/din_TSTRB -into $tb_din_group -radix hex
## add_wave /apatb_pixel_top/din_TKEEP -into $tb_din_group -radix hex
## add_wave /apatb_pixel_top/din_TREADY -into $tb_din_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/din_TVALID -into $tb_din_group -color #ffff00 -radix hex
## add_wave /apatb_pixel_top/din_TDATA -into $tb_din_group -radix hex
## save_wave_config pixel.wcfg
## run all
////////////////////////////////////////////////////////////////////////////////////
// Inter-Transaction Progress: Completed Transaction / Total Transaction
// Intra-Transaction Progress: Measured Latency / Latency Estimation * 100%
//
// RTL Simulation : "Inter-Transaction Progress" ["Intra-Transaction Progress"] @ "Simulation Time"
////////////////////////////////////////////////////////////////////////////////////
// RTL Simulation : 0 / 8 [n/a] @ "210000"
// RTL Simulation : 1 / 8 [n/a] @ "3650000"
// RTL Simulation : 2 / 8 [n/a] @ "6270000"
// RTL Simulation : 3 / 8 [n/a] @ "8890000"
// RTL Simulation : 4 / 8 [n/a] @ "11510000"
// RTL Simulation : 5 / 8 [n/a] @ "14130000"
// RTL Simulation : 6 / 8 [n/a] @ "16750000"
// RTL Simulation : 7 / 8 [n/a] @ "19370000"
// RTL Simulation : 8 / 8 [n/a] @ "21990000"
////////////////////////////////////////////////////////////////////////////////////
$finish called at time : 22070 ns : File "C:/Users/vipin/AppData/Roaming/Xilinx/Vitis/pixel/solution1/sim/verilog/pixel.autotb.v" Line 480
xsim: Time (s): cpu = 00:00:15 ; elapsed = 00:00:09 . Memory (MB): peak = 1200.961 ; gain = 0.000
export_ip_user_files -no_script -force
invalid command name "export_ip_user_files"
export_simulation -directory "C:/Users/vipin/Downloads" -simulator xsim
invalid command name "export_simulation"
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