diff --git a/README.md b/README.md index 0a4abe8933047854ed65e3ac97f0785e82e18467..7f9ef3f14a270d4f9d80f721ae5317a504f428c9 100644 --- a/README.md +++ b/README.md @@ -1,16 +1,20 @@ # How to Compile and Run -1. Clone the project `git clone 'url'` or install the git project with `pip install git+https://mygit.th-deg.de/vt16684/embedded-acceleration` to get all the required python packages before running the jupyter notebook. We are using `pynq package version 2.6.0`(that have not been included in the setup.py). +1. Clone the project with `git clone 'url'` -2. load vitis settings.sh file`. /opt/Xilinx/Vitis_HLS/2020.2/settings64.sh` and run ` make clean && make` +or -3. open the RTL file in vivado and connect the pins as mentioned in the stenganography.pdf (optional: make necessary clock frequency changes) +2. install the git project with `pip install git+https://mygit.th-deg.de/vt16684/embedded-acceleration` to get all the required python packages before running the jupyter notebook. We are using `pynq package version 2.6.0`(that have not been included in the setup.py). -4. (optional load Vivado settings.sh file) run `make` +3. load vitis settings.sh file`. /opt/Xilinx/Vitis_HLS/2020.2/settings64.sh` and run ` make clean && make` -5. Use Test bench files to do the debugging and add changes before synthesizing new overlay. +4. open the RTL file in vivado and connect the pins as mentioned in the stenganography.pdf (optional: make necessary clock frequency changes) -6. Use the given Jupyter notebook to test your iP. +5. (optional load Vivado settings.sh file) run `make` + +6. Use Test bench files to do the debugging and add changes before synthesizing new overlay. + +7. Use the given Jupyter notebook to test your iP.