Commit f59e2ba6 authored by Harald Keller's avatar Harald Keller
Browse files

PL Driver Working - Need to fix Filter logic

parent a4830527
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This diff is collapsed.
%% Cell type:code id: tags:
``` python
from PIL import Image as img
from pynq import Overlay, allocate
import matplotlib.pyplot as plt
import pynq.lib.dma
import numpy as np
oly = Overlay('design_1.bit')
oly.download()
```
%% Cell type:code id: tags:
``` python
dma0 = oly.axi_dma_0
dma1 = oly.axi_dma_1
dma2 = oly.axi_dma_2
dma3 = oly.axi_dma_3
```
%% Cell type:code id: tags:
``` python
inp1 = allocate(shape=(20,), dtype=np.uint32)
inp2 = allocate(shape=(20,), dtype=np.uint32)
inp3 = allocate(shape=(20,), dtype=np.uint32)
op = allocate(shape=(20,), dtype=np.uint32)
for i in range(20):
inp1[i] = 10
inp2[i] = 24 if ((i>4)and(i<8)) else 0
inp3[i] = 15
```
%% Cell type:code id: tags:
``` python
dma0.sendchannel.transfer(inp1)
dma1.sendchannel.transfer(inp2)
dma2.sendchannel.transfer(inp3)
dma0.sendchannel.wait()
dma1.sendchannel.wait()
dma2.sendchannel.wait()
```
%% Cell type:code id: tags:
``` python
oly.edge_filter_0.write(0x10,8)
oly.edge_filter_0.write(0x0,0x1)
dma3.recvchannel.start()
dma3.recvchannel.transfer(op)
dma3
```
%% Cell type:code id: tags:
``` python
dma3.read(0x30)
dma3.read(0x34)
dma3.read(0x4)
```
%% Output
65539
0
%% Cell type:code id: tags:
``` python
op
```
%% Output
PynqBuffer([ 0, 0, 0, 0, 0, 20, 0, 48, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0], dtype=uint32)
%% Cell type:code id: tags:
``` python
inp1
```
%% Output
PynqBuffer([10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
10, 10, 10, 10, 10], dtype=uint32)
%% Cell type:code id: tags:
``` python
inp2
```
%% Output
PynqBuffer([ 0, 0, 0, 0, 0, 24, 24, 24, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0], dtype=uint32)
%% Cell type:code id: tags:
``` python
inp3
```
%% Output
PynqBuffer([15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15], dtype=uint32)
%% Cell type:code id: tags:
``` python
```
......
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