Commit 605b9bb8 authored by Sabyasachi Mondal's avatar Sabyasachi Mondal
Browse files

Update README.md

parent 08b94d73
......@@ -25,7 +25,7 @@ We want to use FPGA for implementing an algorithm in hardware to perform computa
## Objective
Our objective is to use enable continous data stream processing in a pipeline that runs faster using FPGA in comparison to CPU.
We try to implement a image-filter which works by taking data streams and processing them on real time, and the FPGA should work faster than CPU. Our objective is not to make the image-processing-algorithm fast.
We try to implement a image-filter which works by taking data streams and processing them on real time, and the FPGA should work faster than CPU. *My objective is to adapt the FPGA logic design so that it can process multi-channel streams in synchronized manner and still be faster than CPU.*
We should be able to:
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment