Commit 5c716d41 authored by Sabyasachi Mondal's avatar Sabyasachi Mondal
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Update README.md

parent 2d503a6e
......@@ -13,7 +13,7 @@ In FPGA for example may implement multiple multipliers or registers to work in p
But We as software designers can develop our own algorithms bottom up from register levels to a high level code (python for example), which may prove immensely powerful for the task specific algorithm. In our case we use python as a host to drive our fpga.
*FPGA should be able to process multiple streams in synchronized manner. We want to process the streams coming from an image and process them through a convolution algorithm (Robert's matrix) and then use another function to filter out relevant parts*
<b>*FPGA should be able to process multiple streams in synchronized manner. We want to process the streams coming from an image and process them through a convolution algorithm (Robert's matrix) and then use another function to filter out relevant parts*</b>
# Objective
......@@ -21,13 +21,13 @@ Our objective is to use enable continous data stream processing in a pipeline th
We try to implement a image-filter which works by taking data streams and processing them on fly, and the FPGA should work faster than CPU. Our objective is not to make the image-processing-algorithm fast.
We should be able to:
<b>
1. *Remove limitations on length and size of data so the structure can be adapted for real-time continous use*
2. *Enable multiple data stream processing is parallel using the ctrategies used in FPGA for faster processing*
3. *FPGA should be reasonably faster than our CPU for processing streams*
</b>
# Implementation Strategy
Previously we have seen the image resizer takes in the whole data DMA makes the data transfer rate much faster, but we cant process an image or stream of data that is infinitely received and require processing.
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