Commit 216ee9bb authored by Sabyasachi Mondal's avatar Sabyasachi Mondal
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Update README.md

parent 7f74e52d
......@@ -57,6 +57,7 @@ Database in FPGA : https://www.xilinx.com/html_docs/xilinx2020_2/vitis_doc/viti
Vitis Examples : https://github.com/Xilinx/Vitis_Accel_Examples/blob/master/cpp_kernels/README.md
Running Accelerator : https://pynq.readthedocs.io/en/v2.6.1/pynq_alveo.html#running-accelerators
Pragma Interfaces : https://www.xilinx.com/html_docs/xilinx2017_4/sdaccel_doc/jit1504034365862.html
Interface of Streaming : https://www.xilinx.com/html_docs/xilinx2020_2/vitis_doc/managing_interface_synthesis.html#ariaid-title34
##### Future topics
A great resource for 32x32 image dataset: http://chaladze.com/l5/
Book to jumstart or serve as refresher: Programming Machine Learning (Perrotta, Paolo) [ISBN: , 9781680507720]
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