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# FPGA_final_project
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#### Sabyasachi Mondal , Ravi Yadav
fpga vs cpu performance comparison and fpga streamlining for computation intensive tasks
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# Overview
We want to use FPGA for implementing an algorithm in hardware to perform computation more effeciently. CPU hardware is non-flexible so the code runs using the same set of registers and ALU , we cant optimize the harware as per our code. Our objective here is to harware a processing unit (something smilar to a flexible ALU using the CLBs) in the FPGA using High level code.


# Background
CPUs are known for their general purpose use, the same GPUs can power all kinds of applications. EINAC the first computer in a sense had programmable cards, taking days to reprogram but used general purpose computations. CPU can run simulate any finite state machine but can't be reprogrammed as a hardware, for application specific needs like signal processing. For example we may implement an multiplier on the hardware level if we need we can depending on the kind of data we are going to process implement an hardware that can process the exact type of data much faster.

In this case we are going to use the FPGA to implement a processing unit in hardware from High Level C code that will be able to compute 
1. The weight matrix of a neural network 
or 
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2. Do a liner search

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and 
compare how CPU performs in comparision to our FPGA hardware that is exactly wired up to work on the kind of data we expect to provide as input.

# Implementation Strategy
First we need to determine the type of data we would be using in our project. Based on that we need to decide the type of ports and hardware we can use in FPGA.

After this we need to determine a mental sketch of the hardware that if implemented can make the processing faster.

Next we need to know what high level functions transfer to which hardware component and write the code as per the hardware architechture we define in previous step. 

After this we are goingto use the HLS tool Vitis to desgin and then use Vivado to generate our harware programmable bitstream for us, this bitstream configured will be used to process our data. We will be using python APIs to interact with our bitstream.

Next we implement the same algorithm in our python code that will obviously run on the cpu.

Then finally we can check the runtime and reach a conclusion on which is faster and why.

# Tasks
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The Tasks and maximum estimated time:

0. Problem statement and solution Plan brainstorming : 12 hrs
1. Pseudo code and solution adjustment : 3 hrs
2. Vivado study of other solutions, available tools, code and hardware correlation : 12 hrs
3. Writting the code in Vivado : 3 hrs
4. Implementing code and checking hardware features and making final adjustments : 5 hrs
5. Bitstream generation python code for overlay : 2 hrs
6. Implementing same algorithm in python CPU : 3 hrs
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# Resources and Future questions
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To be added later