Commit f3ac6b9e authored by Rashed Al-Lahaseh's avatar Rashed Al-Lahaseh
Browse files

Merge branch 'development' into 'main'

First Release

See merge request !1
parents c7a5b565 d4f579a7
Quartus_Version = Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition
Version_Index = 486699264
Creation_Time = Thu Jul 29 13:47:17 2021
WIDTH=11;
DEPTH=256;
ADDRESS_RADIX=UNS;
DATA_RADIX=BIN;
CONTENT BEGIN
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25 : 00110011000;
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27 : 11111111111;
28 : 11111111111;
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30 : 11111111111;
31 : 11111111111;
32 : 00100001000;
33 : 11111111111;
34 : 11111111111;
35 : 11111111111;
36 : 11111111111;
37 : 00000001000;
38 : 11111111111;
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42 : 11111111111;
43 : 11111111111;
44 : 11111111111;
45 : 11111111111;
46 : 11110001000;
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48 : 11111111111;
49 : 01001001100;
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52 : 11111111111;
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54 : 11111111111;
55 : 11111111111;
56 : 11111111111;
57 : 11111111111;
58 : 11110011100;
59 : 11111111111;
60 : 11111111111;
61 : 11111111111;
62 : 11111111111;
63 : 10000001100;
64 : 11111111111;
65 : 11111111111;
66 : 11111111111;
67 : 11111111111;
68 : 11111111111;
69 : 11111111111;
70 : 00100101100;
71 : 11111111111;
72 : 11111111111;
73 : 11111111111;
74 : 11111111111;
75 : 00110011100;
76 : 01100001100;
77 : 11111111111;
78 : 11111111111;
79 : 11111111111;
80 : 11111111111;
81 : 11111111111;
82 : 00100001100;
83 : 11111111111;
84 : 11111111111;
85 : 11111111111;
86 : 11111111111;
87 : 00000001100;
88 : 11110001100;
89 : 11111111111;
90 : 11111111111;
91 : 11111111111;
92 : 11111111111;
93 : 00000101100;
94 : 11111111111;
95 : 11111111111;
96 : 11111111111;
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98 : 11111111111;
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100 : 11110010110;
101 : 11111111111;
102 : 11111111111;
103 : 11111111111;
104 : 11111111111;
105 : 10000000110;
106 : 11111111111;
107 : 11111111111;
108 : 11111111111;
109 : 11111111111;
110 : 11111111111;
111 : 11111111111;
112 : 00100100110;
113 : 11111111111;
114 : 11111111111;
115 : 11111111111;
116 : 11111111111;
117 : 00110010110;
118 : 11111111111;
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120 : 11111111111;
121 : 11111111111;
122 : 11111111111;
123 : 11111111111;
124 : 11111111111;
125 : 11111111111;
126 : 01100000110;
127 : 11111111111;
128 : 11111111111;
129 : 00000000110;
130 : 11111111111;
131 : 11111111111;
132 : 11111111111;
133 : 11111111111;
134 : 11111111111;
135 : 11111111111;
136 : 11111111111;
137 : 11111111111;
138 : 11110000110;
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140 : 11111111111;
141 : 11111111111;
142 : 11111111111;
143 : 00000100110;
144 : 11111111111;
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146 : 11111111111;
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148 : 11111111111;
149 : 11111111111;
150 : 11111111111;
151 : 11111111111;
152 : 11111111111;
153 : 11111111111;
154 : 11111111111;
155 : 11111111111;
156 : 00100000110;
157 : 11111111111;
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159 : 11111111111;
160 : 11111111111;
161 : 11111111111;
162 : 11111111111;
163 : 11111111111;
164 : 11111111111;
165 : 11111111111;
166 : 11111111111;
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168 : 11111111111;
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174 : 11111111111;
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176 : 11111111111;
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178 : 11111111111;
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180 : 11111111111;
181 : 11111111111;
182 : 11111111111;
183 : 11111111111;
184 : 11111111111;
185 : 11111111111;
186 : 11111111111;
187 : 11111111111;
188 : 11111111111;
189 : 11111111111;
190 : 11111111111;
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192 : 11111111111;
193 : 11111111111;
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195 : 11111111111;
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198 : 11111111111;
199 : 11111111111;
200 : 11111111111;
201 : 11111111111;
202 : 11111111111;
203 : 11111111111;
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209 : 11111111111;
210 : 11111111111;
211 : 11111111111;
212 : 11111111111;
213 : 11111111111;
214 : 11111111111;
215 : 11111111111;
216 : 11111111111;
217 : 11111111111;
218 : 11111111111;
219 : 11111111111;
220 : 11111111111;
221 : 11111111111;
222 : 11111111111;
223 : 11111111111;
224 : 11111111111;
225 : 11111111111;
226 : 11111111111;
227 : 11111111111;
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230 : 11111111111;
231 : 11111111111;
232 : 11111111111;
233 : 11111111111;
234 : 11111111111;
235 : 11111111111;
236 : 11111111111;
237 : 11111111111;
238 : 11111111111;
239 : 11111111111;
240 : 11111111111;
241 : 11111111111;
242 : 11111111111;
243 : 11111111111;
244 : 11111111111;
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246 : 11111111111;
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248 : 11111111111;
249 : 11111111111;
250 : 11111111111;
251 : 11111111111;
252 : 11111111111;
253 : 11111111111;
254 : 11111111111;
255 : 11111111111;
END;
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1627559384080 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition " "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1627559384093 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Jul 29 13:49:43 2021 " "Processing started: Thu Jul 29 13:49:43 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1627559384093 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1627559384093 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off Automated_Laundry_System -c Automated_Laundry_System " "Command: quartus_eda --read_settings_files=off --write_settings_files=off Automated_Laundry_System -c Automated_Laundry_System" { } { } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1627559384093 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "EDA Netlist Writer" 0 -1 1627559386132 ""}
{ "Warning" "WQNETO_SWITCH_TO_FUNCTIONAL_SIMULATION" "" "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." { } { } 0 10905 "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." 0 0 "EDA Netlist Writer" 0 -1 1627559386225 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "Automated_Laundry_System.vho Y:/Developer/DIT/automated-laundry-system/Project/simulation/modelsim/ simulation " "Generated file Automated_Laundry_System.vho in folder \"Y:/Developer/DIT/automated-laundry-system/Project/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1627559386688 ""}
{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 2 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4737 " "Peak virtual memory: 4737 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1627559386792 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Jul 29 13:49:46 2021 " "Processing ended: Thu Jul 29 13:49:46 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1627559386792 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1627559386792 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Total CPU time (on all processors): 00:00:03" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1627559386792 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1627559386792 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Fitter" 0 -1 1627559278784 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1627559278786 ""}
{ "Info" "IMPP_MPP_USER_DEVICE" "Automated_Laundry_System 5CSEMA5F31C6 " "Selected device 5CSEMA5F31C6 for design \"Automated_Laundry_System\"" { } { } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1627559278811 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1627559278877 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1627559278877 ""}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1627559279491 ""}
{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." { } { } 0 292013 "Feature %1!s! is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." 0 0 "Fitter" 0 -1 1627559279545 ""}
{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" { } { } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1627559280228 ""}
{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." { } { } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1627559280241 ""}
{ "Critical Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "67 67 " "No exact pin location assignment(s) for 67 pins of 67 total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report." { } { } 1 169085 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report." 0 0 "Fitter" 0 -1 1627559280604 ""}
{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" { } { } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1627559297704 ""}
{ "Info" "ICCLK_CLOCKS_TOP_AUTO" "1 (1 global) " "Automatically promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "CLOCK_50~inputCLKENA0 60 global CLKCTRL_G10 " "CLOCK_50~inputCLKENA0 with 60 fanout uses global clock CLKCTRL_G10" { } { } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1627559298347 ""} } { } 0 11191 "Automatically promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1627559298347 ""}
{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" { } { } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1627559298350 ""}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" { } { } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1627559298392 ""}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" { } { } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1627559298393 ""}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" { } { } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1627559298394 ""}
{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" { } { } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1627559298394 ""}
{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" { } { } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1627559298395 ""}
{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" { } { } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1627559298395 ""}
{ "Warning" "WTDB_ANALYZE_COMB_LATCHES" "44 " "The Timing Analyzer is analyzing 44 combinational loops as latches. For more details, run the Check Timing command in the Timing Analyzer or view the \"User-Specified and Inferred Latches\" table in the Analysis & Synthesis report." { } { } 0 335093 "The Timing Analyzer is analyzing %1!d! combinational loops as latches. For more details, run the Check Timing command in the Timing Analyzer or view the \"User-Specified and Inferred Latches\" table in the Analysis & Synthesis report." 0 0 "Fitter" 0 -1 1627559301136 ""}
{ "Info" "ISTA_SDC_FOUND" "Automated_Laundry_System.sdc " "Reading SDC File: 'Automated_Laundry_System.sdc'" { } { } 0 332104 "Reading SDC File: '%1!s!'" 0 0 "Fitter" 0 -1 1627559301139 ""}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "e_laundry_fsm:i_e_laundry_fsm\|sl_present_state.availability_state " "Node: e_laundry_fsm:i_e_laundry_fsm\|sl_present_state.availability_state was determined to be a clock but was found without an associated clock assignment." { { "Info" "ISTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT_DETAILS" "Latch sl_word_choice\[2\] e_laundry_fsm:i_e_laundry_fsm\|sl_present_state.availability_state " "Latch sl_word_choice\[2\] is being clocked by e_laundry_fsm:i_e_laundry_fsm\|sl_present_state.availability_state" { } { } 0 13166 "%1!s! %2!s! is being clocked by %3!s!" 0 0 "Design Software" 0 -1 1627559301165 ""} } { } 0 332060 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "Fitter" 0 -1 1627559301165 "|e_my_automated_laundry_system|e_laundry_fsm:i_e_laundry_fsm|sl_present_state.availability_state"}
{ "Warning" "WSTA_CLOCK_SOURCES_FEED_EACH_OTHER" "e_payment_fsm:i_e_payment_fsm\|sl_coin_state.two_euro_690 e_payment_fsm:i_e_payment_fsm\|sl_coin_state.two_euro_690 " "Clock target e_payment_fsm:i_e_payment_fsm\|sl_coin_state.two_euro_690 of clock e_payment_fsm:i_e_payment_fsm\|sl_coin_state.two_euro_690 is fed by another target of the same clock." { } { } 0 332191 "Clock target %1!s! of clock %2!s! is fed by another target of the same clock." 0 0 "Fitter" 0 -1 1627559301166 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1627559301171 ""}
{ "Info" "ISTA_IGNORED_CLOCK_UNCERTAINTY" "" "The following assignments are ignored by the derive_clock_uncertainty command" { } { } 0 332152 "The following assignments are ignored by the derive_clock_uncertainty command" 0 0 "Fitter" 0 -1 1627559301172 ""}
{ "Info" "ISTA_USER_TDC_OPTIMIZATION_GOALS" "" "Detected timing requirements -- optimizing circuit to achieve only the specified requirements" { } { } 0 332129 "Detected timing requirements -- optimizing circuit to achieve only the specified requirements" 0 0 "Fitter" 0 -1 1627559301177 ""}
{ "Info" "ISTA_REPORT_CLOCKS_INFO" "Found 3 clocks " "Found 3 clocks" { { "Info" "ISTA_REPORT_CLOCKS_INFO" " Period Clock Name " " Period Clock Name" { } { } 0 332111 "%1!s!" 0 0 "Design Software" 0 -1 1627559301178 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" "======== ============ " "======== ============" { } { } 0 332111 "%1!s!" 0 0 "Design Software" 0 -1 1627559301178 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 4.000 CLOCK_50 " " 4.000 CLOCK_50" { } { } 0 332111 "%1!s!" 0 0 "Design Software" 0 -1 1627559301178 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 4.000 e_payment_fsm:i_e_payment_fsm\|sl_coin_state.two_euro_690 " " 4.000 e_payment_fsm:i_e_payment_fsm\|sl_coin_state.two_euro_690" { } { } 0 332111 "%1!s!" 0 0 "Design Software" 0 -1 1627559301178 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 4.000 reset " " 4.000 reset" { } { } 0 332111 "%1!s!" 0 0 "Design Software" 0 -1 1627559301178 ""} } { } 0 332111 "%1!s!" 0 0 "Fitter" 0 -1 1627559301178 ""}
{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" { } { } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1627559301228 ""}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" { } { } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1627559301229 ""} } { } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1627559301229 ""}
{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:21 " "Fitter preparation operations ending: elapsed time is 00:00:21" { } { } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1627559301677 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" { } { } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1627559315043 ""}
{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." { } { } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1627559315462 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:04 " "Fitter placement preparation operations ending: elapsed time is 00:00:04" { } { } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1627559319179 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" { } { } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1627559320922 ""}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" { } { } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1627559323769 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:03 " "Fitter placement operations ending: elapsed time is 00:00:03" { } { } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1627559323769 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" { } { } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1627559326071 ""}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 " "Router estimated average interconnect usage is 0% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "5 X11_Y0 X21_Y10 " "Router estimated peak interconnect usage is 5% of the available device resources in the region that extends from location X11_Y0 to location X21_Y10" { } { { "loc" "" { Generic "Y:/Developer/DIT/automated-laundry-system/Project/" { { 1 { 0 "Router estimated peak interconnect usage is 5% of the available device resources in the region that extends from location X11_Y0 to location X21_Y10"} { { 12 { 0 ""} 11 0 11 11 } } } } } } } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1627559334219 ""} } { } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1627559334219 ""}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" { } { } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1627559338265 ""} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Optimizations that may affect the design's timing were skipped" { } { } 0 170200 "Optimizations that may affect the design's timing were skipped" 0 0 "Design Software" 0 -1 1627559338265 ""} } { } 0 170199 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1627559338265 ""}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:06 " "Fitter routing operations ending: elapsed time is 00:00:06" { } { } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1627559338272 ""}
{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 1.16 " "Total time spent on timing analysis during the Fitter is 1.16 seconds." { } { } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1627559344085 ""}
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1627559344143 ""}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1627559345004 ""}
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1627559345004 ""}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1627559345744 ""}
{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:07 " "Fitter post-fit operations ending: elapsed time is 00:00:07" { } { } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1627559351245 ""}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "Y:/Developer/DIT/automated-laundry-system/Project/output_files/Automated_Laundry_System.fit.smsg " "Generated suppressed messages file Y:/Developer/DIT/automated-laundry-system/Project/output_files/Automated_Laundry_System.fit.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1627559351812 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 7 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 7 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "6666 " "Peak virtual memory: 6666 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1627559352782 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Jul 29 13:49:12 2021 " "Processing ended: Thu Jul 29 13:49:12 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1627559352782 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:01:17 " "Elapsed time: 00:01:17" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1627559352782 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:01:49 " "Total CPU time (on all processors): 00:01:49" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1627559352782 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1627559352782 ""}
This diff is collapsed.
<TABLE>
<TR bgcolor="#C0C0C0">
<TH>Hierarchy</TH>
<TH>Input</TH>
<TH>Constant Input</TH>
<TH>Unused Input</TH>
<TH>Floating Input</TH>
<TH>Output</TH>
<TH>Constant Output</TH>
<TH>Unused Output</TH>
<TH>Floating Output</TH>
<TH>Bidir</TH>
<TH>Constant Bidir</TH>
<TH>Unused Bidir</TH>
<TH>Input only Bidir</TH>
<TH>Output only Bidir</TH>
</TR>
<TR >
<TD >i_e_7seg_bcd_decoder</TD>
<TD >4</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >7</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >i_e_7seg_display</TD>
<TD >14</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >35</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >i_e_payment_fsm</TD>
<TD >4</TD>
<TD >3</TD>
<TD >0</TD>
<TD >3</TD>
<TD >14</TD>
<TD >3</TD>
<TD >3</TD>
<TD >3</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >i_e_laundry_fsm</TD>
<TD >17</TD>
<TD >0</TD>
<TD >4</TD>
<TD >0</TD>
<TD >8</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
<TR >
<TD >i_e_memory</TD>
<TD >6</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >1</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
<TD >0</TD>
</TR>
</TABLE>
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Legal Partition Candidates ;
+----------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
; Hierarchy ; Input ; Constant Input ; Unused Input ; Floating Input ; Output ; Constant Output ; Unused Output ; Floating Output ; Bidir ; Constant Bidir ; Unused Bidir ; Input only Bidir ; Output only Bidir ;
+----------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
; i_e_7seg_bcd_decoder ; 4 ; 0 ; 0 ; 0 ; 7 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; i_e_7seg_display ; 14 ; 0 ; 0 ; 0 ; 35 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; i_e_payment_fsm ; 4 ; 3 ; 0 ; 3 ; 14 ; 3 ; 3 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; i_e_laundry_fsm ; 17 ; 0 ; 4 ; 0 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; i_e_memory ; 6 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+----------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
This diff is collapsed.
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