Commit fcbce500 authored by Christian Eckl's avatar Christian Eckl
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Update Dokumentation.md

parent e3fab88b
......@@ -557,7 +557,7 @@ Die ganze sevenseg.c Datei:
[Gesamter Code](https://mygit.th-deg.de/ce12213/Kernelmodul_Sevenseg/blob/master/Sevenseg/sevenseg.c)
# 3. Schaltplan und Wiring
Schaltplan erstelt mit: (https://easyeda.com/editor)
<img src="https://mygit.th-deg.de/ce12213/Kernelmodul_Sevenseg/raw/master/Pictures/Schaltplan.png">
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